1. Field
The present invention relates generally to improvements in phase interpolation circuits and more particularly pertains to phase interpolation circuits based on passive phase interpolation and improvements thereto.
2. Description of the Related Art
Phase interpolation is often used in high-speed signaling circuits for generating precisely aligned clocking signals. Clocking signals oscillate between a high and a low state and are commonly incorporated for coordinating various functions or actions of connected electrical circuits. Phase interpolators are extensively used in delay locked loop (DLL) circuits, phase locked loop (PLL) circuits and many other matching delay circuits in order to provide the desired clocking phase component. Particularly in radio communications equipment, for example, in direct phase modulator radio transmitters, it is important to maintain accurate control over the phase components of these clocking signals. A phase interpolator circuit can provide such a controllable phase by producing a signal having a user-determinable or selectable phase component.
A phase interpolator circuit operates by receiving a plurality of reference input signals with different phase components and generating an output signal having a phase component based upon one or more of the reference input signals. By associating different weights to the various reference input signals and summing those weighted signals, the phase interpolator has the ability to adjust the output signal to have a phase component positioned between the phase components of the reference input signals.
Conventional phase interpolation circuits often incorporate active circuit components to perform the weighting or summation of the various currents or voltages of the reference input signals. However, not only do these active components increase the power consumption of the circuit, but also introduce errors into the generation of the output signal. These errors negatively impact the accurate control of the phase component. Moreover, active circuit components generally have high output capacitances and non-linear output impedances such that attempts to linearly weight any reference input signals with the active circuit components results in non-linear modifications of the output signal. These non-linear changes are demonstrated by deviations in the phase component of the output signal from the desired phase component. Instead of obtaining an output signal with the chosen phase component, the intrinsic nonlinearities of these active components create an output signal having a phase component with an undesired or unexpected offset.
Attempts have been made to mitigate or reduce these deviations in the output signal by using alternative circuit topologies. One attempted circuit configuration employs passive circuit components to perform the weighting on the reference input signals. Unfortunately, such circuit configurations must often trade more area, current, or a decreased interpolation resolution for any such improvements in linear output signal generation. Capacitor-based passive phase interpolation poses particular problems since the capacitive devices suppress the voltage of the circuit and thus require significant additional amplification of the output signal. Not only does such a circuit require larger amounts of power to adequately buffer the output signal for use, but also impacts the signal-to-noise ratio of the output signal due to the diminished voltage level. Capacitive components, as inherently area-based electrical devices, often must be utilized in larger sizes in order to maintain an adequately large voltage for the output signal. Such a design, however, is in direct contravention with the requirements of modern applications which increasingly demand electronic devices be manufactured in ever smaller sizes. Thus, a method or apparatus for providing a controllable phase interpolation signal with high linearity and low power consumption with the capability of delivering a high interpolation resolution is desired.